NOTE: ATE platforms (Teradyne, Advantest, SPEA, COHU) is mandatory for this requirement.

Overview: As the Senior Manager of Test Engineering, you will spearhead the development of Automated Test Equipment (ATE) solutions for both existing and emerging Integrated Circuit (IC) products. This role demands a strategic leader who can bridge the gap between clients and ATE test vendors, ensuring seamless collaboration and efficient test strategies from pilot production through to mass production. Your primary responsibility will be to define and implement test strategies, manage projects, and optimize commercial models to meet both technical and business objectives.

Key Responsibilities:

• Client and Vendor Collaboration: Act as the primary liaison between clients, ATE test vendors, and internal teams. Foster strong relationships with clients and test vendors to align on project goals, test requirements, timely delivery of test solutions, optimize costs, and maintain quality standards.
• Strategic Planning: Develop and execute comprehensive test strategies tailored to each project's needs. Engage in presales activities by crafting proposals that outline effective and cost-efficient commercial models for clients.
• Project Management: Oversee project timelines, resource allocation, and progress reporting. Ensure that test solutions are developed and implemented efficiently, addressing technical challenges proactively.
• Technical Expertise: Utilize your understanding of IC testing and ATE platforms (e.g., Teradyne, Advantest, SPEA, COHU) to design and refine test strategies. Ensure thorough testing of product performance at each stage of development, from pilot to mass production.
• Presales and Proposal Development: Create detailed proposals for clients, highlighting the advantages of proposed test strategies and commercial models. Engage in presales discussions to tailor solutions to client needs.
• Board Design and Test Development: Oversee the design and development of custom test boards and probe cards. Ensure that test programs are scalable, reusable, and accurate.
• Yield and Cost Optimization: Lead initiatives to enhance yield and reduce testing costs. Implement cost-effective solutions while maintaining high-quality standards.
• Technical Support: Provide expert support in sales presentations and product demonstrations. Address customer inquiries related to test equipment, processes, and technical issues.
• Travel: Support troubleshooting and client engagement through on-site (mostly Taoyuan, Hsinchu, Kaohsiung, Tainan), remote (Taipei), or international travel (Bangalore, San Jose, San Diego) as required.

Requirements:

• Educational Background: Bachelor’s or Master’s degree in Electrical Engineering, Micro-electronics, or a related field.
• Experience: Extensive experience in test engineering, particularly with analog, digital, mixed-signal, and RF testing. Familiarity with semiconductor packaging, assembly processes, and OSAT communication is essential. Proven track record in a senior manager role within a top OSAT IC test services company, handling large teams and multiple clients.
• Technical Skills: Proficiency with ATE platforms such as Teradyne, Advantest, SPEA, and COHU. Strong ATE programming skills and experience with DFT implementation and optimisation.
• Project Management: Proven track record of managing semiconductor IC products through NPI and HVM stages. Experience with device thermal characterization and burn-in processes.
• Commercial Acumen: Experience in presales, proposal development, and creating commercial models for low-cost production.
• Communication Skills: Fluent in English and Taiwanese, with the ability to effectively communicate with teams based in India and the US.
• Additional Skills: Experience in board-level design of custom test boards and probe cards, process yield enhancement, and test cost reduction strategies. Proficiency in data analysis software for yield reporting and problem resolution. Experience in integrating instrumentation equipment into larger test systems.

Desirable:

• Prior experience in developing semiconductor production testers, characterization testers or system-level testers is a plus.
• Expertise in IC and package qualification and reliability testing, adhering to global standards (AECQ, JEDEC, IPC).
• Proficiency in using ATE platforms (Teradyne, Advantest, SPEA, COHU) and programming languages.
• Work with industry-leading clients and vendors to drive collaboration, scale up the test engineering business to $25M revenue generation.
• Experience in leading and mentoring large teams in a high-pressure, high-stakes environment.
• Demonstrated success in handling multiple high-profile client accounts and diverse product lines.
• Knowledge of emerging trends and technologies in semiconductor testing.

if anyone interested, please share your update resume girish@zealogics.com

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